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dual, low noise, wideband variable gain amplifiers ad600/ad602 rev. e information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2006 analog devices, inc. all rights reserved. features 2 channels with independent gain control linear in db gain response 2 gain ranges ad600: 0 db to 40 db ad602: C10 db to +30 db accurate absolute gain: 0.3 db low input noise: 1.4 nv/hz low distortion: ?60 dbc thd at 1 v output high bandwidth: dc to 35 mhz (?3 db) stable group delay: 2 ns low power: 125 mw (maximum) per amplifier signal gating function for each amplifier drives high speed adcs mil-std-883-compliant and desc versions available applications ultrasound and sonar time-gain controls high performance audio and rf agc systems signal measurement general description the ad600/ad602 1 dual channel, low noise, variable gain amplifiers are optimized for use in ultrasound imaging systems but are applicable to any application requiring precise gain, low noise and distortion, and wide bandwidth. each independent channel provides a gain of 0 db to +40 db in the ad600 and ?10 db to +30 db in the ad602. the lower gain of the ad602 results in an improved signal-to-noise ratio (snr) at the output. however, both products have the same 1.4 nv/hz input noise spectral density. the decibel gain is directly proportional to the control voltage, accurately calibrated, and supply and temperature stable. to achieve the difficult performance objectives, a proprietary circuit form, the x-amp?, was developed. each channel of the x-amp comprises a variable attenuator of 0 db to ?42.14 db followed by a high speed fixed gain amplifier. in this way, the amplifier never has to cope with large inputs and can benefit from the use of negative feedback to precisely define the gain and dynamics. the attenuator is realized as a 7-stage r-2r ladder network having an inpu t resistance of 100 , laser trimmed to 2%. the attenuation between tap points is 6.02 db; the gain-control circuit provides continuous interpolation between these taps. the resulting control function is linear in db. functional block diagram precision passive input attenuator gating interface scaling reference g a t1 a1op a1cm c1hi c1lo a1hi a1lo v g r-2r ladder network gain control interface rf2 2.24k ? (ad600) 694? (ad602) rf1 20? fixed-gain amplifier 41.07db (ad600) 31.07db (ad602) 500? 0db ?6.02db ?12.04db ?18.06db ?22.08db ?30.1db ?36.12db ?42.14db 62.5 ? 00538-001 figure 1. the gain-control interfaces are fully differential, providing an input resistance of ~15 m and a scale factor of 32 db/v (that is, 31.25 mv/db) defined by an internal voltage reference. the response time of this interface is less than 1 s. each channel also has an independent gating facility that optionally blocks signal transmission and sets the dc output level to within a few millivolts of the output ground. the gating control input is ttl- and cmos-compatible. the maximum gain of the ad600 is 41.07 db, and the maximum gain of the ad602 is 31.07 db; the ?3 db bandwidth of both models is nominally 35 mhz, essentially independent of the gain. the snr for a 1 v rms output and a 1 mhz noise bandwidth is typically 76 db for the ad600 and 86 db for the ad602. the amplitude response is flat within 0.5 db from 100 khz to 10 mhz; over this frequency range, the group delay varies by less than 2 ns at all gain settings. each amplifier channel can drive 100 load impedances with low distortion. for example, the peak specified output is 2.5 v minimum into a 500 load or 1 v into a 100 load. for a 200 load in shunt with 5 pf, the total harmonic distortion for a 1 v sinusoidal output at 10 mhz is typically ?60 dbc. the ad600j/ad602j are specified for operation from 0c to 70c and are available in 16-lead pdip (n) and 16-lead soic_w packages. the ad600a/ad602a are specified for operation from ?40c to +85c and are available in 16-lead cerdip (q) and 16-lead soic_w packages. the ad600s/ ad602s are specified for operation from ?55c to +125c, are available in a 16-lead cerdip (q) package, and are mil-std-883-compliant. the ad600s/ad602s are also available under desc smd 5962-94572. 1 patented.
ad600/ad602 rev. e | page 2 of 28 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 general description ......................................................................... 1 functional block diagram .............................................................. 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 5 esd caution .................................................................................. 5 pin configuration and function descriptions ............................. 6 typical performance characteristics ............................................. 7 theory of operation ...................................................................... 10 noise performance ..................................................................... 10 the gain-control interface ...................................................... 11 signal-gating inputs .................................................................. 11 common-mode rejection ........................................................ 11 achieving 80 db gain range .................................................... 12 sequential mode (maximum snr) ......................................... 12 parallel mode (simplest gain-control interface) .................. 13 low ripple mode (minimum gain error) ............................. 13 applications ..................................................................................... 15 time-gain control (tgc) and time-variable gain (tvg) ................................................................................. 15 increasing output drive ............................................................ 15 driving capacitive loads .......................................................... 15 realizing other gain ranges ................................................... 16 an ultralow noise vca ............................................................ 16 a low noise, 6 db preamplifier ............................................... 16 a low noise agc amplifier with 80 db gain range .......... 17 a wide range, rms-linear db measurement system (2 mhz agc amplifier with rms detector) ....................................... 19 100 db to 120 db rms responding constant bandwidth agc systems with high accuracy db outputs ..................... 21 a 100 db rms/agc system with minimal gain error (parallel gain with offset) ........................................................ 22 a 120 db rms/agc system with optimal snr (sequential gain) ....................................................................... 23 outline dimensions ....................................................................... 27 ordering guide .......................................................................... 28 revision history 1/06rev. d to rev. e updated format..................................................................universal changes to table 2............................................................................ 5 changes to the gain-control interface section........................ 11 updated outline dimensions ....................................................... 27 changes to ordering guide .......................................................... 28 3/04rev. c to rev. d changes to specifications ................................................................ 2 changes to ordering guide ............................................................ 3 changes to figure 3.......................................................................... 8 changes to figure 29...................................................................... 18 updated outline dimensions ....................................................... 20 5/02rev. b to rev. c changes to specifications.................................................................2 renumber tables and tpcs...................................................global 8/01rev. a to rev. b changes to accuracy section of ad600a/ad602a column......2
ad600/ad602 rev. e | page 3 of 28 specifications each amplifier section at t a = 25c, v s = 5 v, ?625 mv v g +625 mv, r l = 500 , and c l = 5 pf, unless otherwise noted. specifications for the ad600/ad602 are identical, unless otherwise noted. table 1. ad600j/ad602j 1 ad600a/ad602a 1 parameter conditions min typ max min typ max unit input characteristics input resistance pin 2 to pin 3; pin 6 to pin 7 98 100 102 95 100 105 input capacitance 2 2 pf input noise spectral density 2 1.4 1.4 nv/hz noise figure r s = 50 , maximum gain 5.3 5.3 db r s = 200 , maximum gain 2 2 db common-mode rejection ratio f = 100 khz 30 30 db output characteristics ?3 db bandwidth v out = 100 mv rms 35 35 mhz slew rate 275 275 v/s peak output 3 r l 500 2.5 3 2.5 3 v output impedance f 10 mhz 2 2 output short-circuit current 50 50 ma group delay change vs. gain f = 3 mhz; full gain range 2 2 ns group delay change vs. frequency v g = 0 v, f = 1 mhz to 10 mhz 2 2 ns total harmonic distortion r l = 200 , v out = 1 v peak, r pd = 1 k ?60 ?60 dbc accuracy ad600 gain error 0 db to 3 db gain 0 +0.5 +1 ?0.5 +0.5 +1.5 db 3 db to 37 db gain ?0.5 0.2 +0.5 ?1.0 0.2 +1.0 db 37 db to 40 db gain ?1 ?0.5 0 ?1.5 ?0.5 +0.5 db maximum output offset voltage 4 v g = C625 mv to +625 mv 10 50 10 65 mv output offset variation v g = C625 mv to +625 mv 10 50 10 65 mv ad602 gain error C10 db to C7 db gain 0 +0.5 +1 C0.5 +0.5 +1.5 db C7 db to +27 db gain ?0.5 0.2 +0.5 ?1.0 0.2 +1.0 db 27 db to 30 db gain ?1 ?0.5 0 ?1.5 ?0.5 +0.5 db maximum output offset voltage 4 v g = ?625 mv to +625 mv 5 30 10 45 mv output offset variation v g = ?625 mv to +625 mv 5 30 10 45 mv gain control interface gain scaling factor +3 db to +37 db (ad600); ?7 db to +27 db (ad602) 31.7 32 32.3 30.5 32 33.5 db/v common-mode range ?0.75 +2.5 ?0.75 +2.5 v input bias current 0.35 1 0.35 1 a input offset current 10 50 10 50 na differential input resistance pin 1 to pin 16; pin 8 to pin 9 15 15 m response rate full 40 db gain change 40 40 db/s
ad600/ad602 rev. e | page 4 of 28 ad600j/ad602j 1 ad600a/ad602a 1 parameter conditions min typ max min typ max unit signal gating interface logic input lo (output on) 0.8 0.8 v logic input hi (output off ) 2.4 2.4 v response time on to off, off to on 0.3 0.3 s input resistance pin 4 to pin 3; pin 5 to pin 6 30 30 k output gated off output offset voltage 10 100 10 400 mv output noise spectral density 65 65 nv/hz signal feedthrough @ 1 mhz ad600 ?80 ?80 db ad602 ?70 ?70 db power supply specified operating range 4.75 5.25 4.75 5.25 v quiescent current 11 12.5 11 14 ma 1 specifications shown in boldface are tested on all production units at final electrical test. results from those tests are used to calculate outgoing quality l evels. all min imum and max imum specifications guaranteed, although only those shown in boldface are tested on all production units. 2 typical open- or short-circuited input; noise is lower when the system is set to maximum gain and the input is short-circuited . this figure includes the effects of both voltage and current noise sources. 3 with an additional 1 k pull-down resistor, if r l < 500 . 4 the dc gain of the main amplifier in the ad600 is 113; therefor e, an input offset of only 100 v becomes an 11.3 mv output o ffset. in the ad602, the amplifiers gain is 35.7; therefore, an input offset of 100 v becomes a 3.57 mv output offset.
ad600/ad602 rev. e | page 5 of 28 absolute maximum ratings table 2. parameter rating supply voltage v s 7.5 v input voltages pin 1, pin 8, pin 9, pin 16 v s pin 2, pin 3, pin 6, pin 7 2 v continuous v s for 10 ms pin 4, pin 5 v s internal power dissipation 600 mw operating temperature range j grade 0c to 70c a grade ?40c to +85c s grade ?55c to +125c storage temperature range ?65c to +150c lead temperature (soldering 60 sec) 300c ja 16-lead p dip 85c/w 16-lead soic _w 100c/w 16-lead cerdip 120c/w stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. esd caution esd (electrostatic discharge) sensitive device. electros tatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge wi thout detection. although this product features proprietary esd protection circuitry, permanent dama ge may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd pr ecautions are recommended to avoid performance degradation or loss of functionality.
ad600/ad602 rev. e | page 6 of 28 pin configuration and fu nction descriptions vpos vneg 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 ad600 / ad602 + ? + ? c1hi a1cm a1op a2op a2cm c2hi c1lo a1hi a 1lo gat1 a 2lo a2hi c2lo gat2 00538-002 figure 2. pin configuration table 3. pin function descriptions pin o. mnemonic description 1 c1lo ch1 gain-control input lo (positive voltage reduces ch1 gain) 2 a1hi ch1 signal input hi (positive voltage increases ch1 output) 3 a1lo ch1 signal input lo (usually connected to ch1 input ground) 4 gat1 ch1 gating input (a logic hi shuts off ch1 signal path) 5 gat2 ch2 gating input (a logic hi shuts off ch2 signal path) 6 a2lo ch2 signal input lo (usually connected to ch2 input ground) 7 a2hi ch2 signal input hi (positive voltage increases ch2 output) 8 c2lo ch2 gain-control input lo (positive voltage reduces ch2 gain) 9 c2hi ch2 gain-control input hi (positive voltage increases ch2 gain) 10 a2cm ch2 common (usually connected to ch2 output ground) 11 a2op ch2 output 12 vneg negative supply for both amplifiers 13 vpos positive supply for both amplifiers 14 a1op ch1 output 15 a1cm ch1 common (usually connected to ch1 output ground) 16 c1hi ch1 gain-control input hi (positive voltage increases ch1 gain)
ad600/ad602 rev. e | page 7 of 28 typical performance characteristics 0.45 ?0.45 0.7 ?0.25 ?0.35 ?0.5 ?0.7 ?0.05 ?0.15 0.05 0.15 0.25 0.35 0.5 0.3 0.1 ?0.1 ?0.3 gain control voltage (v) gain error (db) 00538-003 figure 3. gain error vs. gain control voltage 100m 1m 100k 10m 20db 17db ?45 frequency (hz) 0 ?90 00538-004 figure 4. ad600 frequency and phase response vs. gain 10db 7db ?45 frequency (hz) 0 ?90 100k 1m 10m 100m 00538-005 figure 5. ad602 frequency and phase response vs. gain 10.0 9.0 8.0 9.8 9.6 9.4 9.2 8.2 8.8 8.6 8.4 group delay (ns) 0.7 ?0.5 0.3 0.1 ?0.1 ?0.3 gain control voltage (v) ?0.7 0.5 00538-006 figure 6. ad600 and ad602 typical group delay vs. v c v g =0v 10db/div center freq 1mhz 10khz/div 0 0538-007 figure 7. third-order intermodulation distortion, v out = 2 v p-p, r l = 500 ? 1.0 ?3.4 ?2.8 ?3.2 50 ?3.0 0 ?2.2 ?2.6 ?2.4 ?2.0 ?1.8 ?1.6 ?1.2 ?1.4 2000 1000 500 200 100 load resistance ( ? ) negative output voltage limit (v) 00538-008 figure 8. typical output voltage vs. load resistance (negative output swing limits first)
ad600/ad602 rev. e | page 8 of 28 input impedance ( ? ) 102 92 95 93 94 98 96 97 99 100 101 frequency (hz) 100k 1m 10m 100m gain = 40db gain = 20db gain = 0db 00538-009 figure 9. input impedance vs. frequency 6 ?4 0.7 ?1 ?3 ?0.5 ?2 ?0.7 2 0 1 3 4 5 0.5 gain control voltage (v) output offset voltage (mv) ?0.3 ?0.1 0.1 0.3 ad600 ad602 00538-010 figure 10. output offset voltage vs. gain control voltage (control channel feedthrough) output input 1s 1v vout 1v vc 10 0% 100 90 0 0538-011 figure 11. gain control channel respon se time. top: output voltage, 2 v max, bottom: gain control voltage v c = 625 mv output input 50mv 5v 100ns 10 0% 100 90 00538-012 figure 12. gating feedthrough to output, gating off to on output input 10 0% 100 90 50mv 5v 100ns 00538-013 figure 13. gating feedthrough to output, gating on to off 10 0% 100 90 output input 1v 100mv 500ns 00538-014 figure 14. transient response, medium and high gain
ad600/ad602 rev. e | page 9 of 28 output inpu t 500mv 1v 200ns 10 0% 100 90 00538-015 figure 15. input stage overload recovery time output input 10 0% 100 90 1v 200mv 500ns 00538-016 figure 16. output stage overload recovery time output input 500mv 1v 500ns 10 0% 100 90 00538-017 figure 17. transient response minimum gain 10 ?15 ?40 5 0 ?5 ?10 ?20 ?25 ?30 ?35 cmrr (db) frequency (hz) ad600 ad602 1k 10k 100k 1m 10m 100m ad600: g = 20db ad602: g = 10db both: v cm = 100mv rms v s =5v r l = 500 ? t a = 25c 00538-018 figure 18. cmrr vs. frequency 20 ?30 ?80 10 0 ?10 ?20 ?40 ?50 ?60 ?70 psrr (db) frequency (hz) ad600: g = 40db ad602: g = 30db both: r l = 500 ? v in =0v r s =50 ? 100k 1m 10m 100m ad600 ad602 00538-019 figure 19. psrr vs. frequency ?30 ?80 10 0 ?10 ?20 ?40 ?50 ?60 ?70 c r oss t alk (db) ?90 frequency (hz) 100k 1m 10m 100m ad600: ch1 g = 40db, v in = 0 ch2 g = 20db, v in = 100mv ad602: ch1 g = 30db, v in = 0 ch2 g = 0db, v in = 316mv both: v out = 1v rms1, r s = 50 ? r l = 500 ? crosstalk = 20log ch1 v out ch2 v in ad600 ad602 00538-020 figure 20. crosstalk betwee n a1 and a2 vs. frequency
ad600/ad602 rev. e | page 10 of 28 theory of operation the ad600/ad602 have the same general design and features. they comprise two fixed gain amplifiers, each preceded by a voltage-controlled attenuator of 0 db to 42.14 db with independent control interfaces, each having a scaling factor of 32 db per volt. the ad600 amplifiers are laser trimmed to a gain of 41.07 db (113), providing a control range of ?1.07 db to +41.07 db (0 db to +40 db with overlap). the ad602 amplifiers have a gain of 31.07 db (35.8) and provide an overall gain of ?11.07 db to +31.07 db (?10 db to +30 db with overlap). the advantage of this topology is that the amplifier can use negative feedback to increase the accuracy of its gain. in addition, because the amplifier does not have to handle large signals at its input, the distortion can be very low. another feature of this approach is that the small-signal gain and phase response, and thus the pulse response, are essentially independent of gain. figure 21 is a simplified schematic of one channel. the input attenuator is a 7-stage r-2r ladder network, using untrimmed resistors of nominally r = 62.5 , which results in a characteristic resistance of 125 20%. a shunt resistor is included at the input and laser trimmed to establish a more exact input resistance of 100 2%, which ensures accurate operation (gain and hp corner frequency) when used in conjunction with external resistors or capacitors. precision passive input attenuator gating interface scaling reference gat1 a1op a1cm c1hi c1lo a1hi a1lo v g r-2r ladder network gain control interface rf2 2.24k ? (ad600) 694? (ad602) rf1 20 ? fixed-gain amplifier 41.07db (ad600) 31.07db (ad602) 500? 0db ?6.02db ?12.04db ?18.06db ?22.08db ?30.1db ?36.12db ?42.14db 62.5 ? 00538-021 figure 21. simplified block diagram of single channel of the ad600/ad602 the nominal maximum signal at input a1hi is 1 v rms (1.4 v peak) when using the recommended 5 v supplies; although, operation to 2 v peak is permissible with some increase in hf distortion and feedthrough. each attenuator is provided with a separate signal lo connection for use in rejecting common mode, the voltage between input and output grounds. circuitry is included to provide rejection of up to 100 mv. the signal applied at the input of the ladder network is attenuated by 6.02 db by each section; thus, the attenuation to each of the taps is progressively 0 db, 6.02 db, 12.04 db, 18.06 db, 24.08 db, 30.1 db, 36.12 db, and 42.14 db. a unique circuit technique is employed to interpolate between these tap points, indicated by the slider in figure 21 , providing continuous attenuation from 0 db to 42.14 db. to understand the ad600, it helps to think in terms of a mechanical means for moving this slider from left to right; in fact, it is voltage controlled. the details of the control interface are discussed later. note that the gain is exactly determined at all times, and a linear decibel relationship is guaranteed automatically between the gain and the control parameter that determines the position of the slider. in practice, the gain deviates from the ideal law by about 0.2 db peak (see figure 28 ). note that the signal inputs are not fully differential. a1lo, a1cm (for ch1), a2lo, and a2cm (for ch2) provide separate access to the input and output grounds. this recognizes that even when using a ground plane, small differences arise in the voltages at these nodes. it is important that a1lo and a2lo be connected directly to the input ground(s). significant impedance in these connections reduces the gain accuracy. a1cm and a2cm should be connected to the load ground(s). noise performance an important reason for using this approach is the superior noise performance that can be achieved. the nominal resistance seen at the inner tap points of the attenuator is 41.7 (one third of 125 ), which, at 27c, exhibits a johnson noise spectral density (nsd) of 0.84 nv/hz (that is, 4ktr), a large fraction of the total input noise. the first stage of the amplifier contributes another 1.12 nv/hz, for a total input noise of 1.4 nv/hz. the noise at the 0 db tap depends on whether the input is short-circuited or open-circuited. when shorted, the minimum nsd of 1.12 nv/hz is achieved. when open, the resistance of 100 at the first tap generates 1.29 nv/hz, so the noise increases to 1.71 nv/hz. this last calculation would be important if the ad600 were preceded, for example, by a 900 resistor to allow operation from inputs up to 10 v rms. however, in most cases, the low impedance of the source limits the maximum noise resistance.
ad600/ad602 rev. e | page 11 of 28 it is apparent from the foregoing that it is essential to use a low resistance in the design of the ladder network to achieve low noise. in some applications, this can be inconvenient, requiring the use of an external buffer or preamplifier. however, very few amplifiers combine the needed low noise with low distortion at maximum input levels, and the power consumption required to achieve this performance is quite high (due to the need to maintain very low resistance values while also coping with large inputs). on the other hand, there is little value in providing a buffer with high input impedance, because the usual reason for thisthe minimization of loading of a high resistance source is not compatible with low noise. apart from the small variations just mentioned, the snr at the output is essentially independent of the attenuator setting, because the maximum undistorted output is 1 v rms and the nsd at the output of the ad600 is fixed at 113 114 nv/hz, or 158 nv/hz. therefore, in a 1 mhz bandwidth, the output snr is 76 db. the input nsd of the ad600/ad602 are the same, but because of the 10 db lower gain in the ad602s fixed amplifier, its output snr is 10 db better, or 86 db in a 1 mhz bandwidth. the gain-control interface the attenuation is controlled through a differential, high impedance (15 m) input, with a scaling factor that is laser trimmed to 32 db per volt, that is, 31.25 mv/db. each of the two amplifiers has its own control interface. an internal band gap reference ensures stability of the scaling with respect to supply and temperature variations and is the only circuitry common to both channels. when the differential input voltage v g = 0 v, the attenuator slider is centered, providing an attenuation of +21.07 db, resulting in an overall gain of +20 db (= C21.07 db + +41.07 db). when the control input is ?625 mv, the gain is lowered by +20 db (= +0.625 +32) to 0 db; when set to +625 mv, the gain is increased by +20 db to +40 db. when this interface is overdriven in either direction, the gain approaches either ?1.07 db (= ?42.14 db + +41.07 db) or +41.07 db (= 0 + +41.07 db), respectively. the gain of the ad600 can be calculated by gain (db) = 32 v g + 20 (1) where v g is in volts. for the ad602, the expression is gain (db) = 32 v g + 10 (2) operation is specified for v g in the range from ?625 mv dc to +625 mv dc. the high impedance gain-control input ensures minimal loading when driving many amplifiers in multiple- channel applications. the differential input configuration provides flexibility in choosing the appropriate signal levels and polarities for various control schemes. for example, the gain-control input can be fed differentially to the inputs or single-ended by simply grounding the unused input. in another example, if the gain is controlled by a dac providing a positive-only, ground-referenced output, the gain control lo pin (either c1lo or c2lo) should be biased to a fixed offset of 625 mv to set the gain to 0 db when gain control hi (c1hi or c2hi) is at zero and to set the gain to 40 db when at 1.25 v. it is a simple matter to include a voltage divider to achieve other scaling factors. when using an 8-bit dac with an fs output of 2.55 v (10 mv/bit), a 1.6 divider ratio (generating 6.25 mv/bit) results in a gain setting resolution of 0.2 db/bit. later in this data sheet, cascading the two sections of an ad600 or ad602 when various options exist for gain control is explained (see the achieving 80 db gain range section.) signal-gating inputs each amplifier section of the ad600/ad602 is equipped with a signal gating function, controlled by a ttl or cmos logic input (gat1 or gat2). the ground references for these inputs are the signal input grounds a1lo and a2lo, respectively. operation of the channel is unaffected when this input is lo or left open-circuited. signal transmission is blocked when this input is hi. the dc output level of the channel is set to within a few millivolts of the output ground (a1cm or a2cm) and simultaneously the noise level drops significantly. the reduction in noise and spurious signal feedthrough is useful in ultrasound beam-forming applications, where many amplifier outputs are summed. common-mode rejection a special circuit technique provides rejection of voltages appearing between input grounds (a1lo and a2lo) and output grounds (a1cm and a2cm). this is necessary because of the op amp form of the amplifier, as shown in figure 21 . the feedback voltage is developed across the rf1 resistor (which, to achieve low noise, has a value of only 20 ). the voltage developed across this resistor is referenced to the input common, so the output voltage is also referred to that node. for zero differential signal input between a1hi and a1lo, the output a1op simply follows the voltage at a1cm. note that the range of voltage differences that can exist between a1lo and a1cm (or a2lo and a2cm) is limited to about 100 mv. figure 18 shows the typical common-mode rejection ratio vs. frequency.
ad600/ad602 rev. e | page 12 of 28 achieving 80 db gain range the two amplifier sections of the x-amp can be connected in series to achieve higher gain. in this mode, the output of a1 (a1op and a1cm) drives the input of a2 via a high-pass network (usually just a capacitor) that rejects the dc offset. the nominal gain range is now C2 db to +82 db for the ad600 or ?22 db to +62 db for the ad602. there are several options in connecting the gain-control inputs. the choice depends on the desired snr and gain error (output ripple). the following examples feature the ad600; the arguments generally apply to the ad602, with appropriate changes to the gain values. sequential mode (maximum snr) in the sequential mode of operation, the snr is maintained at its highest level for as much of the gain control range as possible, as shown in figure 22 . note here that the gain range is 0 db to 80 db. figure 23 , figure 24 , and figure 25 show the general connections to accomplish this. both gain-control inputs, c1hi and c2hi, are driven in parallel by a positive-only, ground-referenced source with a range of 0 v to 2.5 v. v g snr (db) 85 30 3.0 45 35 0 40 ?0.5 60 50 55 65 70 75 80 2.5 2.0 1.5 1.0 0.5 00538-022 figure 22. snr vs. control voltage se quential control (1 mhz bandwidth) an auxiliary amplifier that senses the voltage difference between input and output commons is provided to reject this common voltage. v o2 = 1.908v 41.07db input 0db ?40.00db ?40.00db c1hi c1lo 1.07db v g2 output 0db 41.07db ?41.07db ?42.14db c2hi c2lo a1 a2 v o1 = 0.592v v g1 v c = 0v 00538-023 figure 23. ad600 gain control input calculat ions for sequential control operation (a) ?0.51db output 40db a1 41.07db ?0.51db c1hi c1lo 41.07db ?1.07db ?41.63db c2hi c2lo 40.56db a2 v o2 = 1.908v v g2 v o1 = 0.592v v g1 input 0db v c = 1.25v 00538-055 figure 24. ad600 gain control input calculat ions for sequential control operation (b) 38.93db a1 41.07db 0db 0db c1hi c1lo 41.07db ?2.14db c2hi c2lo 41.07db a2 input 0db v c = 2.5v v o1 = 0.592v v g1 v o2 = 1.908v v g2 output 80db 00538-056 figure 25. ad600 gain control input calculat ions for sequential control operation (c)
ad600/ad602 rev. e | page 13 of 28 the gains are offset such that a2s gain is increased only after a1s gain has reached its maximum value (see figure 26 ). note that for a differential input of ?700 mv or less, the gain of a single amplifier (a1 or a2) is at its minimum value of ?1.07 db; for a differential input of +700 mv or more, the gain is at its maximum value of +41.07 db. control inputs beyond these limits do not affect the gain and can be tolerated without damage or foldover in the response. see the specifications section for more details on the allowable voltage range. the gain is now gain (db) = 32 v c (3) where v c is the applied control voltage. +41.07db +20db +1.07db ?0.56db ?1.07db +40.56db +38.93db 809.1 295.0 gain (db) * gain offset of 1.07db, or 33.44mv a1 a2 * * 2.5 80 1.875 60 1.25 40 0.625 20 0 0 ?2.14 v c (v) 82.14 00538-024 figure 26. explanation of offset calibration for sequential control when v c is set to zero, v g1 = ?0.592 v and the gain of a1 is 1.07 db (recall that the gain of each amplifier section is 0 db for v g = 625 mv); meanwhile, v g2 = ?1.908 v, so the gain of a2 is ?1.07 db. the overall gain is thus 0 db (see figure 23 ). when v c = 1.25 v, v g1 = 1.25 v C 0.592 v = 0.658 v, which sets the gain of a1 to 40.56 db, while v g2 = 1.25 v C 1.908 v = ?0.658 v, which sets a2s gain at ?0.56 db. the overall gain is now 40 db (see figure 24 ). when v c = 2.5 v, the gain of a1 is 41.07 db and the gain of a2 is 38.93 db, resulting in an overall gain of 80 db (see figure 25 ). this mode of operation is further clarified by figure 27 , which is a plot of the separate gains of a1 and a2 and the overall gain vs. the control voltage. figure 28 is a plot of the gain error of the cascaded amplifiers vs. the control voltage. parallel mode (simplest gain-control interface) in this mode, the gain-control voltage is applied to both inputs in parallelc1hi and c2hi are connected to the control voltage, and c1lo and c2lo are optionally connected to an offset voltage of 0.625 v. the gain scaling is then doubled to 64db/v, requiring only 1.25 v for an 80 db change of gain. in this case, the amplitude of the gain ripple is also doubled, as is shown in figure 29 , and the instantaneous snr at the output of a2 decreases linearly as the gain is increased (see figure 30 ). low ripple mode (minimum gain error) as can be seen in figure 28 and figure 29 , the output ripple is periodic. by offsetting the gains of a1 and a2 by half the period of the ripple, or 3 db, the residual gain errors of the two amplifiers can be made to cancel. figure 31 shows the much lower gain ripple when configured in this manner. figure 32 plots the snr as a function of gain; it is very similar to that in the parallel mode.
ad600/ad602 rev. e | page 14 of 28 90 ?10 3.0 20 0 0 10 ?0.5 50 30 40 60 70 80 2.5 2.0 1.5 1.0 0.5 v c overall gain (db) combined a1 a2 00538-025 figure 27. plot of separate and overall gains in sequential control 5 ?8 3.0 ?5 ?7 0 ?6 ?0.5 ?2 ?4 ?3 ?1 1 2 4 3 0 1.5 1.0 0.5 v c gain er r or (db) 2.0 2.5 00538-026 figure 28. gain error for cascaded stagessequential control 5 ?3 ?5 0 ?4 ?0.1 0 ?2 ?1 1 2 3 4 1.2 1.0 0.8 gain error (db) v c ?6 0.2 0.4 0.6 00538-027 figure 29. gain error for cascaded stagesparallel control 75 30 1.4 40 35 0.2 0 45 50 55 60 65 70 1.2 1.0 0.8 0.6 0.4 snr (db) v c 00538-028 figure 30. snr for cascaded stagesparallel control 1.2 ?1.2 1.3 ?0.6 ?1.0 0.1 ?0.8 0 0.0 ?0.4 ?0.2 0.2 0.4 0.6 1.0 0.8 1.21.11.00.9 0.70.60.50.40.3 gain er r or (db) v c 0.2 0.8 00538-029 figure 31. gain error for cascaded stageslow ripple mode 80 35 1.4 45 40 0.2 0 50 55 60 65 70 75 1.2 1.0 0.8 0.6 0.4 v c snr (db) 00538-030 figure 32. snr vs. control voltagelow ripple mode
ad600/ad602 rev. e | page 15 of 28 applications the full potential of any high performance amplifier can only be realized by careful attention to details in its applications. the following pages describe fully tested circuits in which many such details have already been considered. however, as is always true of high accuracy, high speed analog circuits, the schematic is only part of the story; this is no less true for the ad600/ ad602. appropriate choices in the overall board layout and the type and placement of power supply decoupling components are very important. as explained previously, the input grounds a1lo and a2lo must use the shortest possible connections. the following circuits show examples of time-gain control for ultrasound and sonar, methods for increasing the output drive, and agc amplifiers for audio and rf/if signal processing using both peak and rms detectors. these circuits also illustrate methods of cascading x-amps for either maintaining the optimal snr or maximizing the accuracy of the gain-control voltage for use in signal measurement. these agc circuits can be modified for use as voltage-controlled amplifiers in sonar and ultrasound applications by removing the detector and substituting a dac or other voltage source for supplying the control voltage. time-gain control (tgc ) and time-variable gain (tvg) ultrasound and sonar systems share a similar requirement: both need to provide an exponential increase in gain in response to a linear control voltage, that is, a gain control that is linear in db. figure 33 shows the ad600/ad602 configured for a control voltage ramp starting at ?625 mv and ending at +625 mv for a gain-control range of 40 db. the polarity of the gain-control voltage can be reversed, and the control voltage inputs c1hi and c1lo can be reversed to achieve the same effect. the gain- control voltage can be supplied by a voltage-output dac, such as the ad7244 , which contains two complete dacs, operates from 5 v supplies, has an internal reference of +3 v, and provides 3 v of output swing. as such, it is well suited for use with the ad600/ad602, needing only a few resistors to scale the output voltage of the dacs to the levels needed by the ad600/ad602. cont r ol v ol t a ge, +625mv ?625mv 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 c1hi a1cm a1op vneg a2op a2cm c2hi c1lo a1hi a1lo gat1 a2lo a2hi c2lo v g ad600 or ad602 gat2 +5v ?5v + ? + ? vpos voltage-output dac a1 gain 0db 40db 00538-031 v g figure 33. the simplest application of the x-amp is as a tgc or tvg amplifier in ultrasound or sonar. only the a1 connections are shown for simplicity. increasing output drive the ad600/ad602s output stage has limited capability for negative-load driving capability. for driving loads less than 500 , the load drive can be increased by approximately 5 ma by connecting a 1 k pull-down resistor from the output to the negative supply (see figure 34 ). driving capacitive loads for driving capacitive loads of greater than 5 pf, insert a 10 resistor between the output and the load. this lowers the possibility of oscillation. vpos vneg v in 1k? 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 c1hi a1cm a1op a2op a2cm c2hi c1lo a1hi a1lo gat1 a2lo a2hi c2lo gain-control voltage gat2 +5v ?5v + ? + ? ad600/ ad602 added pull-down resistor 00538-032 figure 34. adding a 1 k pull-down resistor increases the x-amps output drive by about 5 ma. only the a1 co nnections are shown for simplicity.
ad600/ad602 rev. e | page 16 of 28 realizing other gain ranges larger gain ranges can be accommodated by cascading amplifiers. combinations built by cascading two amplifiers include ?20 db to +60 db (using one ad602), ?10 db to +70 db (using ? of an ad602 followed by ? of an ad600), and 0 db to 80 db (using one ad600). in multiple-channel applications, extra protection against oscillation can be provided by using amplifier sections from different packages. an ultralow noise vca the two channels of the ad600 or ad602 can operate in parallel to achieve a 3 db improvement in noise level, providing 1 nv/hz without any loss of gain accuracy or bandwidth. in the simplest case, as shown in figure 35 , the signal inputs a1hi and a2hi are tied directly together. the outputs a1op and a2op are summed via r1 and r2 (100 each), and the control inputs c1hi/c2hi and c1lo/c2lo operate in parallel. using these connections, both the input and output resistances are 50 . thus, when driven from a 50 source and terminated in a 50 load, the gain is reduced by 12 db, so the gain range becomes C12 db to +28 db for the ad600 and ?22 db to +18 db for the ad602. the peak input capability remains unaffected (1 v rms at the ic pins, or 2 v rms from an unloaded 50 source). the loading on each output, with a 50 load, is effectively 200 , because the load current is shared between the two channels, so the overall amplifier still meets its specified maximum output and distortion levels for a 200 load. this amplifier can deliver a maximum sine wave power of 10 dbm to the load. vpos vneg 100 ? 100 ? 50? gain-control voltage v g ?+ v in v out 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 ad600 or ad602 + ? + ? c1hi a1cm a1op a2op a2cm c2hi c1lo a1hi a1lo gat1 a2lo a2hi c2lo gat2 +5v ?5v 00538-033 figure 35. an ultralow noise vca using the ad600 or ad602 a low noise, 6 db preamplifier in some ultrasound applications, a high input impedance preamplifier is needed to avoid the signal attenuation that results from loading the transducer by the 100 input resistance of the x-amp. high gain cannot be tolerated because the peak transducer signal is typically 0.5 v, while the peak input capability of the ad600 or ad602 is only slightly more than 1 v. a gain of 2 is a suitable choice. it can be shown that if the preamplifiers overall referred-to-input (rti) noise is the same as that due to the x-amp alone (1.4 nv/hz), the input noise of nx2 preamplifier must be (3/4) times as large, that is, 1.2 nv/hz. +5 v ?5v +5v ?5v 1f 0.1f 0.1f v in input ground output ground r1 49.9 ? r2 174 ? r5 42.2 ? r3 562 ? r7 174 ? r8 49.9 ? q1 mrf904 q2 mm4049 100 ? r in of x-amp r6 562? 1f 1f r4 42.2 ? 1f 00538-034 figure 36. a low noise preamplifier for the ad600/ad602 an inexpensive circuit using complementary transistor types chosen for their low r bb is shown in figure 36 . the gain is determined by the ratio of the net collector load resistance to the net emitter resistance. it is an open-loop amplifier. the gain is 2 (6 db) only into a 100 load, assumed to be provided by the input resistance of the x-amp; r2 and r7 are in shunt with this load, and their value is important in defining the gain. for small-signal inputs, both transistors contribute an equal transconductance that is rendered less sensitive to signal level by the emitter resistors, r4 and r5. they also play a dominant role in setting the gain.
ad600/ad602 rev. e | page 17 of 28 this is a class ab amplifier. as v in increases in a positive direction, q1 conducts more heavily and its r e becomes lower while q2 increases. conversely, increasingly negative values of v in result in the r e of q2 decreasing, while the r e of q1 increases. the design is chosen such that the net emitter resistance is essentially independent of the instantaneous value of v in , resulting in moderately low distortion. low values of resistance and moderately high bias currents are important in achieving the low noise, wide bandwidth, and low distortion of this preamplifier. heavy decoupling prevents noise on the power supply lines from being conveyed to the input of the x-amp. table 4. measured preamplifier performance measurement value unit gain (f = 30 mhz) 6 db bandwidth (?3 db) 250 mhz input signal for 1 db compression 1 v p-p distortion v in = 200 mv p-p hd2 0.27 % hd3 0.14 % v in = 500 mv p-p hd2 0.44 % hd3 0.58 % system input noise 1.03 nv/hz spectral density (nsd) (preamp plus x-amp) input resistance 1.4 k input capacitance 15 pf input bias current 150 a power supply voltage 5 v quiescent current 15 ma a low noise agc amplifier with 80 db gain range figure 37 provides an example of the ease with which the ad600 can be connected as an agc amplifier. a1 and a2 are cascaded, with 6 db of attenuation introduced by the 100 resistor r1, while a time constant of 5 ns is formed by c1 and the 50 of net resistance at the input of a2. this has the dual effect of lowering the overall gain range from 0 db to 80 db to ?6 db to 74 db and introducing a single-pole, low-pass filter with a ?3 db frequency of about 32 mhz. this ensures stability at the maximum gain for a slight reduction in the overall bandwidth. the capacitor c4 blocks the small dc offset voltage at the output of a1 (which may otherwise saturate a2 at its maximum gain) and introduces a high-pass corner at about 8 khz, useful in eliminating low frequency noise and spurious signals that can be present at the input. 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 + ? + ? ad600 c1hi a1cm a1op vpos vneg a2op a2cm c2hi c1lo a1hi a1lo gat1 gat2 a2lo a2hi c2lo r1 100 ? rf input c4 0.1f c1 100pf +5 v r3 46.4k ? r4 3.74k ? c3 15pf ad590 +5v q1 2n3904 fb fb +5v ?5v +5v dec ?5v dec 0.1f 0.1f power supply decoupling network rf output +5v dec ?5v dec + ? v ptat v g 300a (at 300k) c2 1f r2 806 ? 1% 00538-035 figure 37. this accurate hf agc amplifier uses three active components
ad600/ad602 rev. e | page 18 of 28 a simple half-wave detector is used based on q1 and r2. the average current into capacitor c2 is the difference between the current provided by the ad590 (300 a at 300 k, 27c) and the collector current of q1. in turn, the control voltage v g is the time integral of this error current. when v g (thus the gain) is stable, the rectified current in q1 must, on average, balance exactly the current in the ad590 . if the output of a2 is too small to do this, v g ramps up, causing the gain to increase until q1 conducts sufficiently. the operation of this control system follows. first, consider the particular case where r2 is zero and the output voltage v out is a square wave at, for example, 100 khz, well above the corner frequency of the control loop. during the time v out is negative, q1 conducts. when v out is positive, it is cut off. since the average collector current is forced to be 300 a and the square wave has a 50% duty-cycle, the current when conducting must be 600 a. with r2 omitted, the peak value of v out would be just the v be of q1 at 600 a (typically about 700 mv) or 2 v be p-p. this voltage, thus the amplitude at which the output stabilizes, has a strong negative temperature coefficient (tc), typically C1.7 mv/c. while this may not be troublesome in some applications, the correct value of r2 renders the output stable with temperature. to understand this, first note that the current in the ad590 is closely proportional to absolute temperature (ptat). in fact, this ic is intended for use as a thermometer. for the moment, assume that the signal is a square wave. when q1 is conducting, v out is the sum of v be . v out is also a voltage that is ptat and that can be chosen to have a tc equal but opposite to the tc of the base-to-emitter voltage. this is actually nothing more than the band gap voltage reference principle in thinly veiled disguise. when r2 is chosen so that the sum of the voltage across it and the v be of q1 is close to the band gap voltage of about 1.2 v, v out is stable over a wide range of temperatures, provided q1 and the ad590 share the same thermal environment. since the average emitter current is 600 a during each half- cycle of the square wave, a resistor of 833 would add a ptat voltage of 500 mv at 300 k, increasing by 1.66 mv/c. in practice, the optimum value of r2 depends on the transistor used and, to a lesser extent, on the waveform for which the temperature stability is to be optimized; for the devices shown and sine wave signals, the recommended value is 806 . this resistor also serves to lower the peak current in q1 and the 200 hz lp filter it forms with c2 helps to minimize distortion due to ripple in v g . note that the output amplitude under sine wave conditions is higher than for a square wave because the average value of the current for an ideal rectifier would be 0.637 times as large, causing the output amplitude to be 1.88 v (= 1.2/0.637), or 1.33 v rms. in practice, the somewhat nonideal rectifier results in the sine wave output being regulated to about 1.275 v rms. an offset of 375 mv is applied to the inverting gain-control inputs c1lo and c2lo. therefore, the nominal C625 mv to +625 mv range for v g is translated upwards (at v g ) to C0.25 v for minimum gain to +1 v for maximum gain. this prevents q1 from going into heavy saturation at low gains and leaves sufficient headroom of 4 v for the ad590 to operate correctly at high gains when using a 5 v supply. in fact, the 6 db interstage attenuator means that the overall gain of this agc system actually runs from C6 db to +74 db. thus, an input of 2 v rms would be required to produce a 1 v rms output at the minimum gain, which exceeds the 1 v rms maximum input specification of the ad600. the available gain range is therefore 0 db to 74 db (or x1 to x5000). since the gain scaling is 15.625 mv/db (because of the cascaded stages), the minimum value of v g is actually increased by 6 +15.625 mv, or about 94 mv, to ?156 mv, so the risk of saturation in q1 is reduced. the emitter circuit of q1 is somewhat inductive (due its finite f t and base resistance). consequently, the effective value of r2 increases with frequency. this results in an increase in the stabilized output amplitude at high frequencies, but for the addition of c3, determined experimentally to be 15 pf for the 2n3904 for maximum response flatness. alternatively, a faster transistor can be used here to reduce hf peaking. figure 38 shows the ac response at the stabilized output level of about 1.3 rms. figure 39 demonstrates the output stabilization for the sine wave inputs of 1 mv to 1 v rms at frequencies of 100 khz, 1 mhz, and 10 mhz. frequency (mhz) agc output change (db) 1 100 10 0.1 3db 00538-036 figure 38. ac response at the stabilized output level of 1.3 v rms
ad600/ad602 rev. e | page 19 of 28 input amplitude (v rms) rel a tive output (db) ?0.4 +0.2 ?0.2 0 0.001 0.01 0.1 1 100khz 1mhz 10mhz 00538-037 figure 39. output stabiliz ation vs. rms input for sine wave inputs at 100 khz, 1 mhz, and 10 mhz while the band gap principle used here sets the output amplitude to 1.2 v (for the square wave case), the stabilization point can be set to any higher amplitude, up to the maximum output of (v s ? 2) v that the ad600 can support. it is only necessary to split r2 into two components of appropriate ratio whose parallel sum remains close to the zero-tc value of 806 . figure 40 shows this and how the output can be raised without altering the temperature stability. r2a q1 2n3904 v ptat rf output r2b to ad600 pin 16 to ad600 pin 11 + ? ad590 5 v r2 = r2a || r2b 806 ? 300a (at 300k) c2 1f c3 15pf 00538-038 figure 40. modification in detector to raise output to 2 v rms a wide range, rms-linear db measurement system (2 mhz agc amplifier with rms detector) monolithic rms-dc converters provide an inexpensive means to measure the rms value of a signal of arbitrary waveform; they can also provide a low accuracy logarithmic (decibel-scaled) output. however, they have certain shortcomings. the first of these is their restricted dynamic range, typically only 50 db. more troublesome is that the bandwidth is roughly proportional to the signal level; for example, the ad636 provides a 3 db bandwidth of 900 khz for an input of 100 mv rms but has a bandwidth of only 100 khz for a 10 mv rms input. its logarithmic output is unbuffered, uncalibrated, and not stable over temperature. considerable support circuitry, including at least two adjustments and a special high tc resistor, is required to provide a useful output. these problems can be eliminated using an ad636 as the detector element in an agc loop, in which the difference between the rms output of the amplifier and a fixed dc reference are nulled in a loop integrator. the dynamic range and the accuracy with which the signal can be determined are now entirely dependent on the amplifier used in the agc system. since the input to the rms-dc converter is forced to a constant amplitude, close to its maximum input capability, the bandwidth is no longer signal dependent. if the amplifier has an exactly exponential (linear-db) gain-control law, its control voltage v g is forced by the agc loop to have the general form () 10log = (4) figure 41 shows a practical wide dynamic range rms- responding measurement system using the ad600. note that the signal output of this system is available at a2op, and the circuit can be used as a wideband agc amplifier with an rms- responding detector. this circuit can handle inputs from 100 v to 1 v rms with a constant measurement bandwidth of 20 hz to 2 mhz, limited primarily by the ad636 rms converter. its logarithmic output is a loadable voltage accurately calibrated to 100 mv/db or 2 v per decade, which simplifies the interpretation of the reading when using a dvm and is arranged to be ?4 v for an input of 100 v rms input, zero for 10 mv, and +4 v for a 1 v rms input. in terms of equation 4, v ref is 10 mv and v scale is 2 v. note that the peak log output of 4 v requires the use of 6 v supplies for the dual op amp u3 ( ad712 ) although lower supplies would suffice for the ad600 and ad636 . if only 5 v supplies are available, it is necessary to either use a reduced value for v scale (say 1 v, in which case the peak output would be only 2 v) or restrict the dynamic range of the signal to about 60 db. as in the previous case, the two amplifiers of the ad600 are used in cascade. however, the 6 db attenuator and low-pass filter found in figure 21 are replaced by a unity gain buffer amplifier u3a, whose 4 mhz bandwidth eliminates the risk of instability at the highest gains. the buffer also allows the use of a high impedance coupling network (c1/r3) that introduces a high-pass corner at about 12 hz. an input attenuator of 10 db (x0.316) is now provided by r1 + r2 operating in conjunction with the ad600s input resistance of 100 . the adjustment provides exact calibration of the logarithmic intercept v ref in critical applications, but r1 and r2 can be replaced by a fixed resistor of 215 if very close calibration is not needed, because the input resistance of the ad600 (and all other key parameters of it and the ad636 ) is already laser trimmed for accurate operation. this attenuator allows inputs as large as 4 v to be accepted, that is, signals with an rms value of 1 v combined with a crest factor of up to 4.
ad600/ad602 rev. e | page 20 of 28 c1hi a1cm a1op vpos vneg a2op a2cm c2hi c1lo a1hi a1lo gat1 gat2 a2lo a2hi c2lo 1 2 3 4 5 6 7 14 13 12 11 10 9 8 u2 ad636 vinp vneg cavg vlog bfop bfin vpos comm ldlo v rms input 1v rms max (sine wave) r2 200 ? r3 133k ? u3a 1/2 ad712 r4 3.01k ? r5 16.2k ? c1 0.1f c2 2f nc nc nc nc nc nc v rms af/rf output c4 4.7f +6v dec r7 56.2k ? r6 3.16k ? c3 1f u3b 1/2 ad712 +316.2mv v out +100mv/db 0v = 0db (at 10mv rms) nc = no connect 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 + ? + ? u1 ad600 fb fb +6v ?6v +6v dec ?6v dec 0.1f 0.1f power supply decoupling network cal 0db +6v dec ?6v dec ?6v dec r1 115 ? v g 15.625mv/db 00538-039 figure 41. the output of this three-ic circuit is proportional to the decibel value of the rms input the output of a2 is ac-coupled via another 12 hz high-pass filter formed by c2 and the 6.7 k input resistance of the ad636. the averaging time constant for the rms-dc converter is determined by c4. the unbuffered output of the ad636 (at pin 8) is compared with a fixed voltage of 316 mv set by the positive supply voltage of 6 v and resistors r6 and r7. v ref is proportional to this voltage, and systems requiring greater calibration accuracy should replace the supply dependent reference with a more stable source. any difference in these voltages is integrated by the op amp u3b, with a time constant of 3 ms formed by the parallel sum of r6/r7 and c3. now, if the output of the ad600 is too high, v rms is greater than the setpoint of 316 mv, causing the output of u3bthat is, v out to ramp up (note that the integrator is noninverting). a fraction of v out is connected to the inverting gain-control inputs of the ad600, so causing the gain to be reduced, as required, until v rms is exactly equal to 316 mv, at which time the ac voltage at the output of a2 is forced to be exactly 316 mv rms. this fraction is set by r4 and r5 such that a 15.625 mv change in the control voltages of a1 and a2 which would change the gain of the cascaded amplifiers by 1 dbrequires a change of 100 mv at v out . notice here that since a2 is forced to operate at an output level well below its capacity, waveforms of high crest factor can be tolerated throughout the amplifier. to check the operation, assume an input of 10 mv rms is applied to the input, which results in a voltage of 3.16 mv rms at the input to a1, due to the 10 db loss in the attenuator. if the system operates as claimed, v out (and hence v g ) should be 0. this being the case, the gain of both a1 and a2 is 20 db and the output of the ad600 is therefore 100 times (40 db) greater than its input, which evaluates to 316 mv rms, the input required at the ad636 to balance the loop. finally, note that unlike most agc circuits that need strong temperature compensation for the internal kt/q scaling, these voltages, and thus the output of this measurement system, are temperature stable, arising directly from the fundamental and exact exponential attenuation of the ladder networks in the ad600. typical results are presented for a sine wave input at 100 khz. figure 42 shows that the output is held close to the setpoint of 316 mv rms over an input range in excess of 80 db. 450 300 150 10 100 10 1 100m 10m 1m 225 375 350 200 275 425 325 175 250 400 input signal (v rms) v out (mv) 00538-040 figure 42. rms output of a2 held close to the setpoint 316 mv for an input range of over 80 db
ad600/ad602 rev. e | page 21 of 28 this system can, of course, be used as an agc amplifier in which the rms value of the input is leveled. figure 43 shows the decibel output voltage. more revealing is figure 44 , which shows that the deviation from the ideal output predicted by equation 1 over the input range 80 v to 500 mv rms is within 0.5 db, and within 1 db for the 80 db range from 80 v to 800 mv. by suitable choice of the input attenuator r1 + r2, this can be centered to cover any range from a low of 25 mv to 250 mv to a high of 1 mv to 10 v, with appropriate correction to the value of v ref . note that v scale is not affected by the changes in the range. the gain ri pple of 0.2 db seen in this curve is the result of the finite interpolation error of the x-amp. note that it occurs with a periodicity of 12 db, twice the separation between the tap points (because of the two cascaded stages). 5 0 ?5 1 2 3 4 ?4 ?3 ?2 ?1 10 100 10 1 100m 10m 1m input signal (v rms) v out (v) 00538-041 figure 43. the db output of figure 41 s circuit is linear over an 80 db range 2.5 0 ?2.5 0.5 1.0 1.5 2.0 ?2.0 ?1.5 ?1.0 ?0.5 output er r or (db) 10 100 10 1 100m 10m 1m input signal (v rms) 00538-042 figure 44. data from figure 42 presented as the deviation from the ideal output given in equation 4 this ripple can be canceled whenever the x-amp stages are cascaded by introducing a 3 db offset between the two pairs of control voltages. a simple means to achieve this is shown in figure 45 : the voltages at c1hi and c2hi are split by 46.875 mv, or 1.5 db. alternatively, either one of these pins can be individually offset by 3 db and a 1.5 db gain adjustment made at the input attenuator (r1 + r2). 16 15 14 13 12 11 10 9 u1 ad600 c1hi a1cm a1op vpos vneg a2op a2cm c2hi +6v dec ?6v dec c2 2f 1 2 3 4 5 6 7 vinp vneg cavg vlog bfop bfin u2 ad636 nc nc nc ?6v dec ?46.875mv nc = no connect 10k ? 10k ? +6v dec ?6v dec 78.7 ? 78.7 ? 3db offset modification +46.875mv 00538-043 figure 45. reducing the gain error ripple the error curve shown in figure 46 demonstrates that over the central portion of the range the output voltage can be maintained close to the ideal value. the penalty for this modification is the higher errors at the extremities of the range. the next two applications show how three amplifier sections can be cascaded to extend the nominal conversion range to 120 db, with the inclusion of simple lp filters of the type shown in figure 37 . very low errors can then be maintained over a 100 db range. 2.5 0 ?2.5 0.5 1.0 1.5 2.0 ?2.0 ?1.5 ?1.0 ?0.5 output error (db) 10 100 10 1 100m 10m 1m input signal (v rms) 00538-044 figure 46. using a 3 db offs et network reduces ripple 100 db to 120 db rms re sponding constant bandwidth agc systems with high accuracy db outputs the next two applications double as both agc amplifiers and measurement systems. in both, precise gain offsets are used to achieve either a high gain linearity of 0.1 db over the full 100 db range or the optimal snr at any gain.
ad600/ad602 rev. e | page 22 of 28 c1hi a1cm a1op vpos vneg a2op a2cm c2hi c1lo a1hi a1lo gat1 gat2 a2lo a2hi c2lo +5v dec ?5v dec ?5v dec nc nc nc nc nc nc c5 22f +5v dec r11 46.4k ? r10 3.16k ? u3c input 1v rms max (sine wave) u3a 1/4 ad713 c2 0.1f nc = no connect r6 10k ? r7 127 ? r8 127 ? r9 10k? +5v ?5v c1hi a1cm a1op vpos vneg a2op a2cm c2hi c1lo a1hi a1lo gat1 gat2 a2lo a2hi c2lo c1 0.1f c3 220pf r4 133k ? r5 1.58k ? r2 487 ? r3 200? r1 133k ? ?2db ?62.5mv 0db +2db +62.5mv c6 4.7f +316.2mv r16 6.65k ? r15 19.6k ? +5v dec r13 3.01k ? r12 11.3k ? r14 301k ? q1 2n3906 1 2 3 4 5 6 7 14 13 12 11 10 9 8 u4 ad636 vinp vneg cavg vlog bfop bfin vpos comm ldlo v rms fb fb +5v ?5v +5v dec ?5v dec 0.1f 0.1f power supply decoupling network 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 + ? + ? u1 ad600 u3b 1/4 ad713 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 + ? + ? u2 ad600 v out +5v dec ?5v dec 1/4 ad713 v log c4 2f 00538-045 figure 47. rms responding agc circuit with 100 db dynamic range a 100 db rms/agc system with minimal gain error (parallel gain with offset) figure 47 shows an rms-responding agc circuit that can be used equally well as an accurate measurement system. it accepts inputs of 10 v to 1 v rms (?100 dbv to 0 dbv) with generous overrange. figure 48 shows the logarithmic output, v log , which is accurately scaled 1 v per decade, that is, 50 mv/db, with an intercept (v log = 0) at 3.16 mv rms (?50 dbv). gain offsets of 2 db were introduced between the amplifiers, provided by the 62.5 mv introduced by r6 to r9. these offsets cancel a small gain ripple that arises in the x-amp from its finite interpolation error, which has a period of 18 db in the individual vca sections. the gain ripple of all three amplifier sections without this offset (in which case, the gain errors simply add) is shown in figure 49 ; it is still a remarkably low 0.25 db over the 108 db range from 6 v to 1.5 v rms. however, with the gain offsets connected, the gain linearity remains under 0.1 db over the specified 100 db range (see figure 50 ). 5 3 ?5 1 10 10 1 100m 10m 1m 100 4 2 0 1 ?1 ?3 ?2 ?4 input signal (v rms) logarithmic output (v) 00538-046 figure 48. v log plotted vs. v in for figure 47 s circuit showing 120 db agc range
ad600/ad602 rev. e | page 23 of 28 2.0 ?2.0 0.5 1.0 1.5 ?1.5 ?1.0 ?0.5 gain er r or (db) ?0.1 0.1 0 1 10 10 1 100m 10m 1m 100 input signal (v rms) 00538-047 figure 49. gain error for figure 41 without the 2 db offset modification 2.0 ?2.0 0.5 1.0 1.5 ?1.5 ?1.0 ?0.5 gain er r or (db) ?0.1 0.1 0 1 10 10 1 100m 10m 1m 100 input signal (v rms) 00538-048 figure 50. adding the 2 db offsets improves the linearization the maximum gain of this circuit is 120 db. if no filtering was used, the noise spectral density of the ad600 (1.4 nv/hz) would amount to an input noise of 8.28 v rms in the full bandwidth (35 mhz). at a gain of one million, the output noise would dominate. consequently, some reduction of bandwidth is mandatory, and in the circuit of figure 47 , it is due mostly to a single-pole, low-pass filter r5/c3, which provides a ?3 db frequency of 458 khz, which reduces the worst-case output noise (at v agc ) to about 100 mv rms at a gain of 100 db. of course, the bandwidth (and therefore the output noise) could be further reduced, for example, in audio applications, merely by increasing c3. the value chosen for this application is optimal in minimizing the error in the v log output for small input signals. the ad600 is dc-coupled, but even miniscule offset voltages at the input would overload the output at high gains; thus, high- pass filtering is also needed. to provide operation at low frequencies, two simple 0s at about 12 hz are provided by r1/c1 and r4/c2; op amp sections u3a and u3b ( ad713 ) are used to provide impedance buffering, because the input resistance of the ad600 is only 100 . a further 0 at 12 hz is provided by c4 and the 6.7 k input resistance of the ad636 rms converter. the rms value of v log is generated at pin 8 of the ad636; the averaging time for this process is determined by c5, and the value shown results in less than 1% rms error at 20 hz. the slowly varying v rms is compared with a fixed reference of 316 mv, derived from the positive supply by r10/r11. any difference between these two voltages is integrated in c6, in conjunction with op amp u3c, the output of which is v log . a fraction of this voltage, determined by r12 and r13, is returned to the gain control inputs of all ad600 sections. an increase in v log lowers the gain because this voltage is connected to the inverting polarity control inputs. in this case, the gains of all three vca sections are being varied simultaneously, so the scaling is not 32 db/v but 96 db/v or 10.42 mv/db. the fraction of v log required to set its scaling to 50 mv/db is therefore 10.42/50 or 0.208. the resulting full- scale range of v log is nominally 2.5 v. this scaling allows the circuit to operate from 5 v supplies. optionally, the scaling can be altered to 100 mv/db, which would be more easily interpreted when v log is displayed on a dvm by increasing r12 to 25.5 k. the full-scale output of 5 v then requires the use of supply voltages of at least 7.5 v. a simple attenuator of 16.6 1.25 db is formed by r2/r3 and the 100 input resistance of the ad600. this allows the reference level of the decibel output to be precisely set to 0 for an input of 3.16 mv rms, and thus center the 100 db range between 10 v and 1 v. in many applications, r2/r3 can be replaced by a fixed resistor of 590 . for example, in agc applications, neither the slope nor the intercept of the logarithmic output is important. a few additional components (r14 to r16 and q1) improve the accuracy of v log at the top end of the signal range (that is, for small gains). the gain starts rolling off when the input to the first amplifier, u1a, reaches 0 db. to compensate for this nonlinearity, q1 turns on at v log ~ 1.5 v and increases the feedback to the control inputs of the ad600s, thereby needing a smaller voltage at v log to maintain the input to the ad636 to the setpoint of 316 mv rms. a 120 db rms/agc system with optimal snr (sequential gain) in the last case, all gains were adjusted simultaneously, resulting in an output snr that is always less than optimal. the use of sequential gain control results in a major improvement in snr, with only a slight penalty in the accuracy of v log , and no penalty in the stabilization accuracy of v agc . the idea is to increase the gain of the earlier stages first (as the signal level decreases) and maintain the highest snr throughout the amplifier chain. this can be easily achieved with the ad600 because its gain is accurate even when the control input is overdriven. that is, each gain control window of 1.25 v is used fully before moving to the next amplifier to the right.
ad600/ad602 rev. e | page 24 of 28 figure 51 shows the circuit for the sequential control scheme. r6 to r9 with r16 provide offsets of 42.14 db between the individual amplifiers to ensure smooth transitions between the gain of each successive x-amp, with the sequence of gain increase being u1a, then u1b, and then u2a. the adjustable attenuator provided by r3 + r17 and the 100 input resistance of u1a, as well as the fixed 6 db attenuation provided by r2 and the input resistance of u1b, are included both to set v log to read 0 db when v in is 3.16 mv rms and to center the 100 db range between 10 v rms and 1 v rms input. r5 and c3 provide a 3 db noise bandwidth of 30 khz. r12 to r15 change the scaling from 625 mv/decade at the control inputs to 1 v/decade at the output. at the same time, r12 to r15 center the dynamic range at 60 db, which occurs if the v g of u1b is equal to 0. these arrangements ensure that the v log still fits within the 6 v supplies. r14 7.32k ? r15 5.11k ? +6v dec r13 866 ? c1hi a1cm a1op vpos vneg a2op a2cm c2hi c1lo a1hi a1lo gat1 gat2 a2lo a2hi c2lo +6v dec ?6v dec ?6v dec nc nc nc nc nc nc c5 22f +6v dec r11 56.2k ? r10 3.16k ? u3c u3a 1/4 ad713 c2 0.1f nc = no connect r6 3.4k ? r8 294 ? +6v c1hi a1cm a1op vpos vneg a2op a2cm c2hi c1lo a1hi a1lo gat1 gat2 a2lo a2hi c2lo c4 2f c1 0.1f c3 0.001f r4 133k ? r5 5.36k ? r2 100 ? r1 133k ? c6 4.7f +316.2mv 1 2 3 4 5 6 7 14 13 12 11 10 9 8 u4 ad636 vinp vneg cavg vlog bfop bfin vpos comm ldlo v rms fb fb +6v ?6v +6v dec ?6v dec 0.1f 0.1f power supply decoupling network u3b 1/4 ad713 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 + ? + ? u2 ad600 v out +5v dec ?5v dec 1/4 ad713 v log r7 1k? r16 287 ? r9 1k? r17 115 ? r3 200 ? 0db adjust input 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 ref a1 a2 + ? + ? u1 ad600 r12 1k? 00538-049 figure 51. 120 db dynamic range rms responding circuit optimized for snr
ad600/ad602 rev. e | page 25 of 28 5 3 ?5 4 2 0 1 ?1 ?3 ?2 ?4 logarithmic output (v) 1 10 10 1 100m 10m 1m 100 input signal (v rms) 00538-050 figure 52. v log is linear over the full 120 db range figure 52 shows v log to be linear over a full 120 db range. figure 53 shows the error ripple due to the individual gain functions bounded by 0.2 db (dotted lines) from 6 v to 2 v. the small perturbations at about 200 v and 20 mv, caused by the impracticality of matching the gain functions perfectly, are the only sign that the gains are now sequential. figure 54 is a plot of v agc that remains very close to its set value of 316 mv rms over the full 120 db range. to compare the snrs in the simultaneous and sequential modes of operation more directly, all interstage attenuation was eliminated (r2 and r3 in figure 47 and r2 in figure 51 ), the input of u1a was shorted, r5 was selected to provide a 20 khz bandwidth (r5 = 7.87 k), and only the gain control was varied, using an external source. the rms value of the noise was then measured at v out and expressed as an snr relative to 0 dbv, which is almost the maximum output capability of the ad600. results for the simultaneous mode can be seen in figure 55 . the snr degrades uniformly as the gain is increased. note that since the inverting gain control was used, the gain in this curve and in figure 56 decreases for more positive values of the gain-control voltage. 2.0 ?2.0 0.5 1.0 1.5 ?1.5 ?1.0 ?0.5 gain error (db) ?0.2 0.2 0 1 10 10 1 100m 10m 1m 100 input signal (v rms) 00538-051 figure 53. error ripple due to the individual gain functions 400 300 200 350 250 gain error (mv) 1 10 10 1 100m 10m 1m 100 input signal (v rms) 00538-052 figure 54. v agc remains close to its setpoint of 316 mv rms over the full 120 db range 90 0 833.2 20 10 ?625.0 ?833.2 30 40 50 60 70 80 625.0 416.6 208.3 0 ?208.3 ?416.6 v c (mv) snr (db) 00538-053 v c scale = 10.417mv/db figure 55. snr vs. control voltage for parallel gain control (see figure 47 ) in contrast, the snr for the sequential mode is shown in figure 56 . u1a always acts as a fixed noise source; varying its gain has no influence on the output noise. this is a feature of the x-amp technique. therefore, for the first 40 db of control range (actually slightly more, as is explained later), when only this vca section has its gain varied, the snr remains constant. during this time, the gains of u1b and u2a are at their minimum value of ?1.07 db. v c (v) 90 0 3.817 20 10 ?0.558 ?1.183 30 40 50 60 70 80 3.192 2.567 1.942 1.317 0.692 0.067 snr (db) 00538-054 v c scale = 31.25mv/db figure 56. snr vs. control voltage for sequential gain control (see figure 51 )
ad600/ad602 rev. e | page 26 of 28 for the next 40 db of control range, the gain of u1a remains fixed at its maximum value of 41.07 db and only the gain of u1b is varied, while that of u2a remains at its minimum value of ?1.07 db. in this interval, the fixed output noise of u1a is amplified by the increasing gain of u1b and the snr progressively decreases. once u1b reaches its maximum gain of 41.07 db, its output also becomes a gain independent noise source; this noise is presented to u2a. as the control voltage is further increased, the gains of both u1a and u1b remain fixed at their maximum value of 41.07 db, and the snr continues to decrease. figure 56 clearly shows this, because the maximum snr of 90 db is extended for the first 40 db of input signal before it starts to roll off. this arrangement of staggered gains can be easily implemented because when the control inputs of the ad600 are overdriven, the gain limits to its maximum or minimum values without side effects. this eliminates the need for awkward nonlinear shaping circuits that have previously been used to break up the gain range of multistage agc amplifiers. the precise values of the ad600s maximum and minimum gain (not 0 db and +40 db but ?1.07 db and +41.07 db) explain the rather odd values of the offset values that are used. the optimization of the output snr is of obvious value in agc systems. however, in applications where these circuits are considered for their wide range logarithmic measurement capabilities, the inevitable degradation of the snr at high gains need not seriously impair their utility. in fact, the bandwidth of the circuit shown in figure 47 was specifically chosen to improve measurement accuracy by altering the shape of the log error curve at low signal levels (see figure 53 ).
ad600/ad602 rev. e | page 27 of 28 outline dimensions controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. corner leads may be configured as whole or half leads. compliant to jedec standards ms-001-ab 0.022 (0.56) 0.018 (0.46) 0.014 (0.36) 0.150 (3.81) 0.130 (3.30) 0.115 (2.92) 0.070 (1.78) 0.060 (1.52) 0.045 (1.14) 16 1 8 9 0.100 (2.54) bsc 0.800 (20.32) 0.790 (20.07) 0.780 (19.81) pin 1 0.210 (5.33) max seating plane 0.015 (0.38) min 0.005 (0.13) min 0.280 (7.11) 0.250 (6.35) 0.240 (6.10) 0.060 (1.52) max 0.430 (10.92) max 0.014 (0.36) 0.010 (0.25) 0.008 (0.20) 0.325 (8.26) 0.310 (7.87) 0.300 (7.62) 0.015 (0.38) gauge plane 0.195 (4.95) 0.130 (3.30) 0.115 (2.92) figure 57. 16-lead plastic dual in-line package [pdip] narrow body (n-16) dimensions shown in inches and (millimeters) controlling dimensions are in inches; millimeter dimensions (in parentheses) are rounded-off inch equivalents for reference only and are not appropriate for use in design. 0.840 (21.34) max 15 0 0.320 (8.13) 0.290 (7.37) 0.015 (0.38) 0.008 (0.20) 0 .200 (5.08) max 0.200 (5.08) 0.125 (3.18) 0.023 (0.58) 0.014 (0.36) 0.310 (7.87) 0.220 (5.59) 0.005 (0.13) min 0.098 (2.49) max 0.100 (2.54) bsc pin 1 1 8 9 16 seating plane 0.150 (3.81) min 0.070 (1.78) 0.030 (0.76) 0.060 (1.52) 0.015 (0.38) figure 58. 16-lead ceramic dual in-line package [cerdip] (q-16) dimensions shown in inches and (millimeters) controlling dimensions are in millimeters; inch dimensions (in parentheses) are rounded-off millimeter equivalents for reference only and are not appropriate for use in design. compliant to jedec standards ms-013-aa seating plane 0.30 (0.0118) 0.10 (0.0039) 0.51 (0.0201) 0.31 (0.0122) 2.65 (0.1043) 2.35 (0.0925) 1.27 (0.0500) bsc 16 9 8 1 10.65 (0.4193) 10.00 (0.3937) 7.60 (0.2992) 7.40 (0.2913) 10.50 (0.4134) 10.10 (0.3976) 8 0 0.75 (0.0295) 0.25 (0.0098) 45 1.27 (0.0500) 0.40 (0.0157) 0.33 (0.0130) 0.20 (0.0079) coplanarity 0.10 figure 59. 16-lead standard small outline package [soic_w] wide body (rw-16) dimensions shown in millimeters and (inches)
ad600/ad602 rev. e | page 28 of 28 ordering guide model gain range temperature range package description package option ad600aq 0 db to 40 db ?40c to +85c 16-lead cerdip q-16 ad600ar 0 db to 40 db ?40c to +85c 16-lead soic_w rw-16 ad600ar-reel 0 db to 40 db ?40c to +85c 16-lead soic_w rw-16 ad600ar-reel7 0 db to 40 db ?40c to +85c 16-lead soic_w rw-16 ad600arz 1 0 db to 40 db ?40c to +85c 16-lead soic_w rw-16 ad600arz-r7 1 0 db to 40 db ?40c to +85c 16-lead soic_w rw-16 ad600arz-rl 1 0 db to 40 db ?40c to +85c 16-lead soic_w rw-16 ad600jn 0 db to 40 db 0c to 70c 16-lead pdip n-16 ad600jnz 1 0 db to 40 db 0c to 70c 16-lead pdip n-16 ad600jr 0 db to 40 db 0c to 70c 16-lead soic_w rw-16 ad600jr-reel 0 db to 40 db 0c to 70c 16-lead soic_w rw-16 ad600jr-reel7 0 db to 40 db 0c to 70c 16-lead soic_w rw-16 ad600jrz 1 0 db to 40 db 0c to 70c 16-lead soic_w rw-16 AD600JRZ-R7 1 0 db to 40 db 0c to 70c 16-lead soic_w rw-16 ad600jrz-rl 1 0 db to 40 db 0c to 70c 16-lead soic_w rw-16 ad600sq/883b 2 0 db to 40 db ?55c to +125c 16-lead cerdip q-16 ad602aq ?10 db to +30 db ?40c to +85c 16-lead cerdip q-16 ad602ar ?10 db to +30 db ?40c to +85c 16-lead soic_w rw-16 ad602ar-reel ?10 db to +30 db ?40 c to +85c 16-lead soic_w rw-16 ad602ar-reel7 ?10 db to +30 db ?40c to +85c 16-lead soic_w rw-16 ad602arz 1 ?10 db to +30 db ?40c to +85c 16-lead soic_w rw-16 ad602arz-r7 1 ?10 db to +30 db ?40c to +85c 16-lead soic_w rw-16 ad602arz-rl 1 ?10 db to +30 db ?40c to +85c 16-lead soic_w rw-16 ad602jchips die ad602jn ?10 db to +30 db 0c to 70c 16-lead pdip n-16 ad602jnz 1 ?10 db to +30 db 0c to 70c 16-lead pdip n-16 ad602jr ?10 db to +30 db 0c to 70c 16-lead soic_w rw-16 ad602jr-reel C10 db to +30 db 0c to 70c 16-lead soic_w rw-16 ad602jr-reel7 ?10 db to +30 db 0c to 70c 16-lead soic_w rw-16 ad602jrz 1 ?10 db to +30 db 0c to 70c 16-lead soic_w rw-16 ad602jrz-r7 1 C10 db to +30 db 0c to 70c 16-lead soic_w rw-16 ad602jrz-rl 1 ?10 db to +30 db 0c to 70c 16-lead soic_w rw-16 ad602sq/883b 3 ?10 db to +30 db ?55c to +150c 16-lead cerdip q-16 1 z = pb-free part. 2 refer to ad600/ad602 military data sheet. also available as 5962-9457201mea. 3 refer to ad600/ad602 military data sheet. also available as 5962-9457202mea. ?2006 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. c00538-0-1/06(e)

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